Schmitt trigger-based single-ended 7T SRAM cell for Internet of Things (IoT) applications

Abstract

The Internet of Things is an emerging application area which is going to become one of the leading electronic hubs in the semiconductor industry. The IoT systems require battery-enabled energy-efficient memory circuits to operate at ultra-low voltage (ULV). In this paper, a novel Schmitt trigger-based, single-ended 7-Transistor (7T) Static Random Access Memory (SRAM) cell which uses dynamic body bias technique for IoT applications is presented. The proposed 7T SRAM cell is designed using standard 45nm Complementary Metal Oxide Semiconductor technology at an ULV of 0.3V. The post-layout simulation results have shown more than 22% improvements in the Read Static Noise Margin and more than 44% write, 63% read energy savings in comparison with the conventional 6T cell, 7T, single-ended 8T, and Schmitt trigger 11T cell designs. The proposed design is also found to be stable at different process corners and supply voltages. A new quality metric SNM per unit Area to Energy Ratio which evaluates the overall performance of the SRAM cell design is calculated and is found to be highest for the proposed design.