Abstract
This paper presents a reversible structure for priority encoder. In order to expand the proposed design, the proposed structure is presented based on a modular method. For this purpose, first using the feature of insignificance of least-significant inputs when the value of most-significant input is one in the priority encoder, a special purpose reversible OR gate is introduced. Then, using this gate, we provide a reversible structure for the 4: 2 priority encoder. The proposed structure is designed entirely with reversible OR gates and inverter gates. We design the cell layout of this structure in QCADesigner software. In order to prove the modularity of the proposed design, the structure of 8: 3 reversible priority encoder is designed using 4: 2 reversible priority encoder.
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