Reactive ion etching-induced damage in InAlAs/InGaAs heterostructure field-effect transistors processed in HBr plasma

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An investigation of the effects of HBr reactive ion etching (RIE) processing for gate recessing in lattice-matched InAlAs/InGaAs heterostructure field-effect transistors (HFETs) has been conducted. The effect of varying the Schottky barrier layer thickness on device performance and the susceptibility of HFETs to RIE-induced damage are presented for barrier layer thicknesses ranging from 10 to 25 nm. The effect of plasma self-bias voltage during gate recess etching on overall device performance for a given layer structure is also examined for voltages ranging from −100 to −200 V. Device performance is assessed through direct current (dc) characterization of transconductance, threshold voltage, reverse gate leakage current, and gate-drain breakdown voltage, and through microwave characterization of the devices. Devices with barrier layers less than 20 nm thick are found to suffer the most degradation due to RIE-induced damage. For devices with sufficiently thick barrier layers, dc and microwave device parameters compare well with those of corresponding devices fabricated using a selective wet-etch process.