Abstract
A radix-4 energy efficient carry-free truncated multiplier is proposed and designed based on a linear array left-to-right carry-free (LRCF) multiplier [1]-[3]. In our proposed multiplier, the final product is obtained in parallel with the reduction of partial products in carry-save form using an improved on-the-fly conversion of O(n) size based on conditional adders. In addition to the proposed multiplier, several right-to-left, left-to-right multipliers and a Dadda tree multiplier for various precisions (16, 24, 32, 56 and 64 bits) are designed, synthesized in 90nm technology and compared, demonstrating the advantages of the proposed design with respect to area, delay, and power. Our proposed multiplier has lower delay (except a tree multiplier), area, power and energy than other types of multipliers, and this advantage grows with the increase in precision.
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call