Abstract

Abstract An organic interposer technology with ultra-fine line and space is required in order to achieve high density interconnection between chips. In this paper we propose a high reliability, ultra-fine trench wiring process. Current trench wiring is made by laser ablation of dielectric, spattering, copper plating and then Chemical mechanical polishing (CMP). However, it is challenging for laser ablation to achieve fine trench with smooth side wall and CMP is not suitable because of high assembly cost. Reliability is another challenge because of the narrower and thinner insulator. We have developed photosensitive insulation film (PIF) with fine resolution. The trench wiring of 2/2 μm line and space has been successfully assembled by photolithography, plating and surface planer method as the alternative to CMP. The wiring layer of 2/2 μm line and space, which was covered with the thin barrier metal layer and PIF, has passed the biased highly accelerated temperature and humidity stress test (HAST) screening. In addition to the above process a copper paste has been applied as a seed layer instead of the spattering. The sintered copper filled with adhesive paste into the copper porous is compatible as the seed layer and the wiring layer of 10/10 μm line and space has passed the reliability tests such as MSL2, thermal cycling test and biased HAST.

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