Process compatibility in integrated processing of semiconductor devices in multichamber systems

Abstract

This paper reviews recent results with respect to formation of heterostructure devices in multichamber processing environments with in vacuo surface analysis diagnostics and in situ process monitoring. The emphasis is on the formation of two types of thin film device structures (i) gate stacks for metal–oxide–semiconductor (MOS) devices, including field effect transistors (FETs) and (ii) semiconductor thin film devices including amorphous Si thin film transistors (TFTs) and p-i-n diodes. Thin films of the dielectric and semiconductor materials for these structures have been deposited by low-temperature, remote plasma-enhanced chemical vapor deposition (PECVD). A key step in the processing of these devices is the formation of electronically active interfaces between the various constituent layers. For the MOS structures this generally requires preparation of the semiconductor substrate prior to the deposition of the dielectric film. Our studies indicate that this final substrate processing step is crucial to electrical quality the semiconductor/dielectric interface, and should generally be performed in the same chamber as the dielectric deposition. This observation has prompted us to re-evaluate design criteria for the individual processing chambers in multichamber systems in the context of requiring that chambers dedicated to film deposition should also provide the internal fixtures, gas flow and pressure control that are necessary for substrate processing as well as film deposition.