Abstract

Printed microstrip interconnects are gaining attention as designers seek a more-compact, lower-loss scheme to replace wire bonds. Aerosol Jet® printed interconnects have the potential to lower insertion losses by creating conductors with arbitrary geometries and zero loop height. Printed dielectric and conductor materials typically have inferior electrical properties compared to bulk-deposited materials. There is a question whether these properties will produce unacceptable S21 losses in printed interconnects. This work presents calculations of the effect of the printed material’s properties on S21. HFSS modeling from 0.1 to 100 GHz was conducted on two representative interconnect structures. A trench in an RF substrate filled with dielectric and a dielectric ramp from a substrate up to a GaAs die. The microstrip (or transmission) line over a filled trench represents the filled region around a die that sits down in a “pocket” in the dielectric and contacts the ground plane. Conductors modeled include a pure copper reference along with conductors with four and ten times the resistivity of bulk silver. The dielectric constant of the insulator varied from 2.8 to 4.3 and the loss tangent varied from 0.004 to 0.04. For simplicity, an unpatterned GaAs die was used in place of an RF IC. The work focuses on estimating any degradations in performance of an ideal reference circuit caused by the material properties of real printed materials. Also presented are the dielectric properties of our current materials along with properties of candidate materials that have better thermo-mechanical properties (shrink, CTE, Tg…).

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