Prediction of NBTI Degradation in Dynamic Voltage Frequency Scaling Operations

Abstract

In the nano-CMOS era, negative bias temperature instability (NBTI) has become one of the major limiting factors of circuit lifetime. Degradation caused by NBTI effect is profoundly affected by today's complicated circuit operations, such as dynamic voltage frequency scaling, in which power supply and frequency vary with time elapsing. Therefore, accurate NBTI prediction is essential to CMOS circuit design for reliability. To achieve this target, this paper 1) revises the closed-form reaction–diffusion and trapping/detrapping models to improve their aging prediction, under the situation when supply voltage, frequency, and duty factor consecutively change; 2) proposes an efficient calculation framework for our revised closed-form models to provide accurate aging prediction over a long time span; 3) validates our revised models and calculation methods by using the parameters extracted from a 65-nm CMOS process. Compared with the previous closed-form models, our revised models and the related calculation methods are able to provide convincing aging predictions. In the future, the revised models and the calculation methods will be introduced into the exploration on circuit design for reliability.