Abstract
As per the Moore’s Prediction in 1965, the transistors count on a single chip will be doubled after every 18 months. Although, current integrated circuit technologies are posing limitations to this law. Further, device feature size scaling also introduces certain limitation on CMOS technology due to occurrence of short channel effects in nano-meter regime. FinFET based devices are found to be very promising candidate in deep submicron region. This paper aims to investigate the various performance characteristics of different topologies such as 6T,7T,8T and ST10T FinFET based static random access memory (SRAM) cells at 18nm channel length. It has been observed that read power in 8T SRAM cell is significantly reduced by 2.065 times as compared to ST10T SRAM cell. The write delay of 8T SRAM cell is improved by 1.29 times as of 6T SRAM cell. This is also worth noticeable that read stability and write stability are improved by factor of 1.25 times and 1.08 times respectively as of conventional 6T SRAM cell.
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