Performance Analysis of GaAs DG-JLMOSFET: Impact of Gate Oxide and Its Thickness

Abstract

In this paper, the gate oxide material and its thickness both are varied in a GaAs based double gate junctionless MOSFET (DG-JLMOSFET) to observe how this proposed model mitigates short channel effects (SCEs) and ensures reduced OFF-state leakage current with larger ON-state current. Five different types of oxide materials are used for the simulation among which TiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> has shown tremendous improvement in all aspects. Also, for the first time, the performance of DG-JLMOSFET has been analyzed by varying the thickness of the oxide material. Here, SIL V ACO ATLAS TCAD simulation tool was used for all simulations. For the DG-JLMOSFET, with the increase of the dielectric constant of gate oxide material while decreasing the thickness of the gate-oxide improves SCEs with subthreshold slope (SS) and drain induced barrier lowering (DIBL) of 69.81 mV/dec and 54.21 mV/V respectively and a high ON-state to OFF-state current ratio (I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf> /I <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</inf> ) of 6.52×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">9</sup> A/Dec. With these improved SCEs this proposed structure can be used practically in future.