Abstract
Hybrid insulator pentacene thin film transistors (TFTs) are fabricated with thermally grown oxide and cross‐linked polyvinylalcohol (PVA) including surface treatment by dilute ploymethylmethacrylate (PMMA) layer on n+ doped silicon wafer. Through the optimization of SiO2 layer thickness in hybrid insulator structure, carrier mobility is increased to more than 35 times than that of the TFT which has only a gate insulator of SiO2 at the same electric field. The carrier mobility of 1.80 cm2/V‐s, subthreshold swing of 1.81 V/decade, and Ion/Ioff current ratio > 1.10 × 105 are obtained less than ‐30 V bias condition. The result is one of the best reported performances of pentacene TFTs with hybrid insulator including cross‐linked PVA layer as a gate insulator at relatively low voltage operation.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
