Abstract
There is a need in the semiconductor industry for a dopant profiling technique with nm-scale resolution. Here we demonstrate that off-axis electron holography can be used to provide maps of the electrostatic potential in semiconductor devices with nm-scale resolution. In this paper we will discuss issues regarding the spatial resolution and precision of the technique. Then we will discuss problems with specimen preparation and how this affects the accuracy of the measurements of the potentials. Finally we show results from experimental off-axis electron holography applied to nMOS and pMOS CMOS devices grown on bulk silicon and silicon- on-insulator type devices and present solutions to common problems that are encountered when examining these types of devices.
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