Novel 1T DRAM Cell for Low-Voltage Operation and Long Data Retention Time

Abstract

A novel one-transistor dynamic random access memory (1T DRAM) cell has been proposed for a low-voltage operation and longer data retention time. The proposed IT DRAM cell has three features compared with a conventional IT DRAM cell: low body doping concentration, a recessed gate structure, and a P + poly-Si gate. Simulation results show that the proposed IT DRAM cell has 100-ms data retention time under the condition of sub-1-V operating voltage.