Study of hot carrier degradation in dram cells combining random telegraph signal and charge pumping measurements

Abstract

This paper reports random telegraph signal (RTS) noise and charge pumping measurements both performed on the selection transistor of a single 16 Mbits dynamic random access memory (DRAM) cell. Hot carrier induced degradation has been evaluated after stress in terms of generation of slow and fast interface traps. Due to the three dimensional design of the DRAM cell, we show how it is possible to scan electrically active defects in different parts of the transistor structure by varying the potential distributions in the DRAM cell. Defect location is then made possible using complementary numerical simulations.