A low power L-shaped gate bipolar impact ionization MOSFET based capacitorless one transistor dynamic random access memory cell

Abstract

In this paper, a capacitorless, low power and CMOS compatible L-shaped gate bipolar impact ionization metal-oxide semiconductor (L-BIMOS) one transistor dynamic random access memory (1T DRAM) cell is proposed. The proposed 1T DRAM offers high retention time (RT = ∼1.4 s), sense margin (SM = ∼45 μA μm−1) and read current ratio (∼5 orders of magnitude). The RT and SM are 1.86×, and 300× , respectively higher than the previously reported silicon germanium (SiGe) based BIMOS 1T DRAM. Therefore, the proposed 1T DRAM cell stands out to be power efficient, and provides better integration density that makes it suitable for various emerging computing applications.