Abstract
AbstractIn the phase‐locked loop (PLL), the following mehods are used to eliminate the steady‐state phase error produced by the input signal with frequency off‐set: (1) the perfect integrator is used as the loop filter, realizing the perfect second‐order PLL; (2) the dual phase‐locked loop (DuLL) is constructed by combining two first‐order PLL's, realizing a perfect second‐order PL, L. Method (1) has the problem of VCO drift, and method (2) has the problem that the choice of the loop constant (damping factor) is limited. Furthermore, both methods have the problem of unsatisfactory performance for the interfacing signal. This paper proposes a new DuLL which is constructed by adding a feedback circuit from the second PLL to the first PLL in the conventional DuLL. By theoretical analysis, it is shown that the new DuLL can remedy the problems in conventional circuits. Then the circuit is constructed by a digital signal processing technique. The pull‐in and interference characteristics are examined by computer simulation, indicating that the new DuLL has excellent characteristics.
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have