A novel dual PLL if block for on-board LEO satellite receivers

Abstract

Generally, on-board LEO (Low Earth Orbit) satellite receivers work at extremely low carrier power levels and require high sensitivity for efficient demodulation. These receivers should not only be capable of operating at low input SNR (Signal to Noise Ratio) but also able to compensate an appreciable Doppler Frequency shift with varying power levels (depending upon the satellite orbit and operating frequency). Thus an efficient LEO satellite receiver should possess a large dynamic range and should be able to compensate an appreciable Doppler shift. In conventional satellite receivers, the IF block (which is responsible for demodulation and frequency compensation) are mostly designed using either the Foster Seeley or single Frequency synthesizer based approach. The Foster Seeley based approach has a good dynamic range but is very sensitive to the in-band noise generated by receiver electronics. On the other hand, single frequency synthesizer approach has a better noise immunity but it is unable to provide appreciable dynamic range, high sensitivity and low carrier input power operation. Therefore, in order to meet these contradictory requirements, the design of IF (Intermediate Frequency) block for narrow band LEO satellite TC receivers becomes a challenging task. In this paper, a novel dual PLL (Phase Locked Loop) design technique has been employed to cater for all the above performance requirements in telecommand receiver's IF block. First Phase Locked Loop is used to demodulate the carrier with improved noise performance and efficient Doppler compensation while second PLL is added to ensure the desired low carrier input power operation, appreciable dynamic range and high sensitivity and good noise performance.