Abstract

A low-power pseudo-random bit sequence (PRBS) generator for testing a high-speed optical transmitter module has been realised in a 130 nm bipolar CMOS process. The transmitter consists of a monolithic driver circuit architecture and a heterojunction bipolar transistor (HBT)-based carrier-injection electro-absorption modulator. A 10 Gbit/s current mode logic latch with only 0.6 mW power consumption is designed by scaling down the current density without degrading the overall transmitter speed performance. The 27−1 PRBS generator circuit consumes only 42.75 mW at 6 Gbit/s operating speeds with a 1.5 V dc power supply. The core circuit power consumption is 9 mW.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.