Abstract

The terahertz SPICE FET model has been experimentally validated in Si CMOS and InGaAs HEMTs up to 4.5 THz and updated to account for parasitic gate fringing capacitance and parasitic source and drain resistance. The model is in good agreement with experimental data at low and high THz field intensities. We also show that introducing additional capacitances linking the drain and gate electrodes may lead to enhancement of the THz plasmonic detector response at lower THz frequencies. The simulation results of the plasmonic detector response to a single terahertz pulse are in good agreement with our measured data.

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