Low voltage, high resolution studies of electron beam resist exposure and proximity effect

Abstract

Resist exposure characteristics have been studied over a voltage range from 1 to 10 kV in order to demonstrate the feasibility of using low voltage electron beam lithography (EBL) to pattern submicron features without the proximity effect problems seen at higher voltages. The exposures were done by modifying a 25 kV thermal field emission EBL machine to run in a retarding field configuration where the sample is biased at a large negative potential, thus reducing the final beam landing energy. After analyzing the linewidths of various proximity test patterns with features as small as 0.15 μm, we conclude that at these dimensions the proximity effect on silicon substrates, compared to 10 kV, is greatly reduced at 5 kV and almost negligible at 3 kV. In order to maintain resolution at these low voltages, it is normally necessary to reduce the beam current due to increased aberrations and reduced source brightness. However, calculations and experiments show that these problems are much less severe in the retarding field configuration, where the electron beam is accelerated to a high potential through most of the optical path length and then reduced to the working voltage just before striking the workpiece. In addition, the reduced beam current is compensated by an almost corresponding increase in the resist sensitivity. Thus, low voltage is shown to be an effective means of avoiding the proximity effect, and a tool using the combination of a thermal field emission electron source and a retarding field final lens is shown to have the resolution and beam current required to expose patterns at the required voltage with reasonable throughput.