Look ahead carry adder using diode free adiabatic logic family

Abstract

Reduction in power dissipation is one of the major concerns for researchers in electronics industry. Carry look ahead adder is widely used for fast calculations but it dissipates lot of power due to which expensive cooling system has to be deployed. In this paper a 3-bit carry look ahead adder is implemented using diode free adiabatic logic which has much superior performance than CMOS circuits in terms of power dissipation and power delay product. The performance of the circuit is verified through simulations in Tanner EDA simulator using 180nm CMOS TSMC parameters. Higher energy efficiency is achieved in the proposed circuit.