Abstract
A surface-doped SOI (Silicon-On-Insulator) LD (Lateral Double-diffused) MOSFET with a linearly-graded surface-doping profile is proposed which allows low on-resistance and high static and on-state breakdown voltage. The characteristics of the proposed LDMOS are verified by the two-dimensional process simulator TSUPREM4 and the device simulator, MEDICI. A reduction of the on-resistance by 83.4% from 62.9 Ω cm to 10.4 Ω cm and an increase in the static breakdown voltage from 146 V to 205 V and in the on-state breakdown voltage from 42 V to 96 V for a 10 V gate voltage are obtained for the proposed device when compared with those of the conventional one.
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