Junctionless tri-gate InGaAs MOSFETs

Abstract

We demonstrate and characterize junctionless tri-gate InGaAs MOSFETs, fabricated using a simplified process with gate lengths down to Lg = 25 nm at a nanowire dimension of 7 × 16 nm2. These devices use a single 7-nm-thick In0.80Ga0.20As (ND = 1 × 1019 cm−3) layer as both channel and contacts. The devices show SSsat = 76 mV/dec, peak gm = 1.6 mS/µm and ION = 160 µA/µm (at IOFF = 100 nA/µm and VDD = 0.5 V), the latter which is the highest reported value for a junctionless FET. We also show that device performance is mainly limited by high parasitic access resistance due to the narrow and thin contact layer.