Abstract

The prospect of enhanced device performance from III–V materials has been recognized for at least 50 years, and yet, relative to the phenomenal size of the Si-based IC industry, these materials fulfilled only specific niches and were often referred to as “the material of the future” [1]. A key restriction enabling widespread use of III–V materials is the lack of a high quality, natural insulator for III–V substrates like that available for the SiO 2/Si materials system [2]. The prospect of impending scaling challenges for technologies based on silicon metal oxide semiconductor field effect transistor (MOSFET) devices has brought renewed focus on the use of alternate surface channel materials from the III–V compound semiconductor family. The performance of the traditional MOSFET device structure is dominated by defects at the semiconductor/oxide interface, which in turn requires a high quality semiconductor surface. In this review, reflecting the authors’ current opinion, the recent progress in the understanding of the dielectric/III–V interface is summarized, particularly in regard to the interfacial chemistry that impacts the resultant electrical behavior observed. The first section summarizes the nature of the oxidation states of surface oxides on In x Ga 1− x As. Then the atomic layer deposition of such oxides on the In x Ga 1− x As surface is summarized in view of the interfacial chemical reactions employed. Finally the resultant electrical properties observed are examined, including the effects of substrate orientation. Portions of this review have been published previously [3,4].

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