Insight Into Electron Traps and Their Energy Distribution Under Positive Bias Temperature Stress and Hot Carrier Aging

Abstract

The access transistor of SRAM can suffer both positive bias temperature instability (PBTI) and hot carrier aging (HCA) during operation. The understanding of electron traps (ETs) is still incomplete and there is little information on their similarity and differences under these two stress modes. The key objective of this paper is to investigate ETs in terms of energy distribution, charging and discharging properties, and generation. We found that both PBTI and HCA can charge ETs which center at 1.4 eV below conduction band ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$E_{c}$ </tex-math></inline-formula> ) of high-k dielectric, agreeing with theoretical calculation. For the first time, clear evidences are presented that HCA generates new ETs, which do not exist when stressed by PBTI. When charged, the generated ETs’ peak is 0.2 eV deeper than that of preexisting ETs. In contrast with the power law kinetics for charging the preexisting ETs, filling the generated ETs saturates in seconds, even under an operation bias of 0.9 V. ET generation shortens device lifetime and must be included in modeling HCA. A cyclic and antineutralization ETs model is proposed to explain PBTI and HCA degradation, which consists of preexisting cyclic ETs, generated cyclic ETs, and antineutralization ETs.