Abstract
Currently, a tunnel field-effect transistor (TFET) is being considered as a suitable electrostatic discharge (ESD) protection device in advanced technology. In addition, silicon-germanium (SiGe) engineering is shown to improve the performance of TFET-based ESD protection devices. In this paper, a new TFET with SiGe source/drain (S/D) regions is proposed, and its ESD characteristics are evaluated using technology computer aided design (TCAD) simulations. Under a transmission line pulsing (TLP) stressing condition, the triggering voltage of the SiGe S/D TFET is reduced by 35% and the failure current is increased by 17% in comparison with the conventional Si S/D TFET. Physical insights relevant to the ESD enhancement of the SiGe S/D TFET are provided and discussed.
Highlights
Under a transmission line pulsing (TLP) stressing condition, the triggering voltage of the SiGe S/D tunnel field-effect transistor (TFET) is reduced by 35% and the failure current is increased by 17% in comparison with the conventional Si S/D TFET
A traditional metal-oxide-semiconductor field-effect transistor (MOSFET) has a 60 mV/dec subthreshold swing at room temperature, which limits the application of this device in ultra-low power integrated circuits (ICs) [1,2]
The TFET has a very low driving current compared with the MOSFET, which means it is difficult to realize a high-speed circuit using pure TFETs
Summary
A traditional metal-oxide-semiconductor field-effect transistor (MOSFET) has a 60 mV/dec subthreshold swing at room temperature, which limits the application of this device in ultra-low power integrated circuits (ICs) [1,2]. The tunnel field-effect transistor (TFET) is a promising candidate for replacing the conventional MOSFET in low power ICs [3,4,5]. As mentioned in reference [9], TFET can be used to replace the traditional diodes in an ESD protection network to enhance the ESD robustness in nanoscale technology ICs. The ESD behavior of the TFET has been studied using experiments and technology computer aided design (TCAD) simulations [15,16,17,18]. Transmission line pulsing (TLP) pulses, which mimic the stressing of the human body model (HBM), are used to simulate the quasi-static current-voltage (I-V) behavior of the devices during the ESD conditions. Tinhtiesrflaeacedsotnotahne ednrhaainncseidmee.nTthiins tlheeadesletcotraicnfieenldhaantctehme ednrtaiinn/tshuebestleracttericinftieerlfdacaet athned dcoranisne/qsuubensttrlaytae irnedteurcfaticoenainndthcoentrsiegqgueernvtolyltaagree.duction in the trigger voltage
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