Improvement of the CMOS characteristics of bulk Si FinFETs by high temperature ion implantation

Abstract

For the first time, we have established a replacement metal gate complementary metal-oxide-semiconductor process flow for the high temperature ion implantation of bulk Si fin field-effect-transistors on a 45-nm fin pitch design rule, using high temperature spin-on-carbon hard mask and a dedicated patterning process. In this paper, the advantages of high temperature ion implantation and a detailed process flow of the dedicated patterning are explained. Electrical characteristics of metal-oxide-semiconductor field-effect-transistors and ring oscillators are evaluated.