Implementation of digital IIR filter design based on field programmable gate array

Abstract

Abstract Programmable Gate Array (FPGA) software is widely used in digital signal processing (DSP), and DSP algorithms are used in many fields, such as voice signal processing, audio signal processing, picture processing, information systems, system control, etc. Using digital filters as an example, this article uses these three methods to apply filter algorithms and detail the design steps and final validation of the simulation. Based on the recently published low-level parallel filter FIR structure, this document proposes a new design to reduce device complexity. A large number of devices can be stored with the new system. For example, for FIR 576 click filters, when the level of parallelism changes from 12 to 72, the new system can double from 1755 to 3375 at the cost of 21 to 4658 additions and delay elements 1516 to 4749, respectively. This algorithm not only reduces the complexity of computing, but also partially maintains the multiplier aggregation structure, which leads to efficient implementation. This article presents hybrid programming methods that use VB and Matlab to design digital filters.