Abstract
Field Programmable Gate Array (FPGA) devices are widely used in the field of Digital Signal Processing (DSP), and the algorithm of DSP has been used in many fields such as speech signal processing, audio signal processing, image processing, information system, control system and so on. In the development and design of modern digital systems, the use of programmable logic devices is becoming more and more common. There are many ways to implement signal processing algorithm based on FPGA: the first one is to design with VHDL or Verilog HDL language; the second one is to use mature IP core encapsulated by FPGA company; the third one is to design with EDA tools such as MATLAB fdatool/Simulink/DSP Builder/Modelsim/Quartus II. Taking the digital filter as an example, this paper uses these three methods to realize the filtering algorithm, and introduces the detailed design steps and the final simulation verification.
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