Impact of source-to-drain tunnelling on the scalability of arbitrary oriented alternative channel material nMOSFETs

Abstract

In this work, the scalability of alternative channel material double gate nano nMOSFETs has been investigated by the mean of semi-analytical models of I on/ I off currents, accounting for quantum capacitance degradation, short channel effects, band-to-band and source-to-drain tunnelling in arbitrary substrate and channel direction. Contrary to most of the previous study neglecting source-to-drain tunnelling, it has been found that for devices with physical gate length below 13 nm (as required in the 22 and 16 nm nodes), this mechanism significantly penalises the I on/ I off trade off of small effective masses channel materials like Ge or GaAs, much more than in the case of Si and biaxially strained Si (s-Si). In addition, only strained Si-MOSFETs has been found to meet the performance expectation of the International Technology Roadmap of Semiconductor for the 22 nm and 16 nm technological nodes.