Impact of Ge on integration of HfO2 and metal gate electrodes on strained Si channels

Abstract

Tensile-strained Si epitaxial layers (7.5nm–17nm) were grown on relaxed Si0.5Ge0.5 virtual substrates by ultrahigh-vacuum rapid thermal chemical vapor deposition. Metal-oxide-silicon capacitors were fabricated with SiO2 or HfO2 as gate dielectrics and Ru–Ta alloy or TaN as the metal gate electrodes. The results indicate that the interface trap density (Dit) increased as the strained silicon thickness decreased, which was attributed to the presence of Ge in the strained Si layer. Higher Dit was observed with SiO2 which may be due to Si consumption during oxidation, leading to a higher density of Ge at the interface. Leakage current density (Jg) was also observed to increase with increasing strained silicon thickness. This trend of increasing Dit and Jg with decreasing strained silicon thickness did not change after rapid thermal annealing. Both Ru–Ta and TaN gate electrodes were found to exhibit as good a performance on strained Si as on bulk Si.