Abstract
Summary form only given. Due to their paramount importance for the development of high performance and low power/low voltage SOI CMOS technologies, SOI MOSFET short channel effects and subthreshold characteristics have been studied extensively and are now both well understood and fairly well controlled. The same is true for hot carrier effects and reliability of n-channel SOI MOSFETs. However, as with the bulk CMOS case, hot carrier studies of p-channel SOI MOSFETs have lagged behind, with only a few reports available in the open literature (Tsuchiya et al. 1994; Renn et al, 1998). This is rather surprising, since an important hot carrier induced short channel effect, hot electron induced punchthrough (HEIP), has been found to be the worst case condition in predicting the lifetime of bulk p-channel devices (Koyanagi et al. 1987). In this paper an investigation of the HEIP in p-channel SOI MOSFETs is carried out. It is found that, much like the bulk case, hot electron trapping in the gate oxide near the drain causes an effective drain extension, thereby causing a corresponding punchthrough voltage reduction. A logarithmic time dependence of this reduction is observed, in good agreement with a simple one-dimensional analytical model.
Published Version
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