Abstract

This article presents a highly stable single-ended 7T (SE-7T) SRAM cell in subthreshold region. Using Monte-Carlo simulations critical design metrics of proposed SE-7T SRAM cells are estimated. Estimated results are compared with that of conventional 6T SRAM cell. The SE-7T SRAM cell offers 2.71× and 2.71× and 8.42 X improvements in Read Access Time (T RA ) and Write Access Time (T WA ) for write-1 and write-0 respectively. The proposed bit cell also offers 3.28× improvement in read static noise margin (RSNM) and 1.22× higher hold power@ 350 mV.

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