High-mobility p-channel metal-oxide-semiconductor field-effect transistors on Ge-on-insulator structures formed by lateral liquid-phase epitaxy

Abstract

High-mobility p-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated on germanium-on-insulator (GOI) structures formed by lateral liquid-phase epitaxy (LLPE) from the Si seed areas. It was found that appropriate rapid annealing conditions for LLPE effectively suppress intermixing at the Si seed regions and produce tensile strained single-crystalline Ge layers surrounded by SiO2 microcrucibles. We examined the electrical properties of the thin Ge layers using GOI MOSFETs with back-gate control in the p-type accumulation mode. Excellent transistor performance, such as a low off-leakage current of 1 × 10−7 μA/μm, a high on/off current ratio of 106, and high low-field hole mobility of 480 cm2/Vs, which is 2.8 times higher than that of the reference silicon-on-insulator device, was demonstrated, indicating that the LLPE method provides high-quality local GOI structures and that it is a feasible way to fabricate the next-generation Ge-based devices.