Abstract
Schottky-barrier (SB) heights of erbium and platinum silicides are evaluated using current–voltage and capacitance–voltage methods in the Schottky diodes. For the erbium-silicided Schottky diodes, the extracted SB heights show big differences depending on the extraction methods, due to the existence of the interface traps. The interface traps in the erbium silicide are efficiently cured by <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$hboxN_2$</tex> annealing. Various sizes of the erbium/platinum-silicided n/p-type SB-MOSFETs are manufactured from 20 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$muhboxm$</tex> to 23 nm. Also, <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$hboxN_2$</tex> annealing is applied to enhance the SB-MOSFETs' subthreshold characteristics by minimizing the interface-trap density. The manufactured SB-MOSFETs show a good drain-induced barrier thinning and subthreshold swing characteristics, due to the existence of a SB between the source and the channel, which indicates the possible application of the SB-MOSFETs in a nanoscale regime.
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