Hardware Design and Analysis of Ring Oscillator Based Noise Source for True Random Number Generators

Abstract

The confidentiality required to protect cryptographic system output from unauthorized access is provided over random numbers. This has led to a strong link between cryptography and the generator designs from which random numbers are obtained. The power of the cryptographic systems that Random Number Generators (RNG) use is directly related to the quality of the random numbers obtained from these generators. Recently, in terms of system security, digital circuit based applications on generators ASIC (Application Specific Integrated Circuits) and FPGA (Field Programmable Gate Array) hardware have become increasingly popular. Instead of ASIC technologies, FPGA implementations are often preferred, which can provide specific solutions to issues such as ease of application, speed and reprogrammability. Ring oscillators are often preferred as sources of noise / randomness in true RNG, especially those that can be designed with different digital circuit elements on an FPGA. In this study, real-time applications of ring oscillator-based noise sources with reference to true RNG’ s are given. The design strategies of the reference models are examined and the hardware implementations are explained in detail. In addition, the results obtained from the reference models have been compared in terms of their cryptographic qualifications. A successful implementation of this work will be a guideline for the design of different RNG’s with an oscillator base.