Chaotic Ring Oscillator Based True Random Number Generator Implementations in FPGA

Abstract

True Random Number Generator (TRNG) performs an important role in the field of information security systems for secure system design. The TRNGs designs are used as initialization vectors, as generating random bits and nonces in encryption protocols. TRNGs when implemented on Field Programmable Gate Array (FPGA), becomes viable for integration into designs of Internet of Things (IoT) products for cyber security applications. The most important component of TRNG is its entropy source. Implementation in FPGA exploits the jitter from ring oscillator (RO) circuits as a source of entropy. In this work, various TRNG architectures were reviewed and implemented on FPGA Xilinx Zynq Z7. We have implemented Ring Oscillators by varying number of inverters and analysed its performance. It was seen that RO TRNG with 24 inverters gave the best performance even without post-processing. We have also reviewed various chaotic circuits for TRNG and implemented chaotic oscillator based TRNG and compared it with ring oscillator based TRNG. The randomness performance of all TRNGs was analysed using National Institute of Standards and Technology (NIST) test suite. To improve the randomness using the chaotic circuit, we used a circuit having chaos in the ring oscillator. We also propose a new architecture for FPGA implementation of chaotic ring oscillator based TRNG. The proposed chaotic circuit passed all NIST tests which is crucial for cyber security aspects of Internet of Things products.