FPGA Implementation of a Pseudorandom Number Generator Based on k – Logistic Map

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Data encryption is a way to increase security of data by using cryptographic keys generated from random numbers. Random Number generator (RNG), which produces such numbers, is classified as True Random Number Generator (TRNG) or Pseudorandom Number generator (PRNG). The first one uses physical phenomena to generate random numbers whereas the second one uses deterministic systems. A commonly used deterministic system in PRNG applications is the logistic map, a nonlinear system that under certain operating ranges becomes chaotic. However, the logistic map alone does not generate satisfactory random sequence because the sequence generated is not uniformly distributed, and it does not have good results in statistical tests, such as the NIST test suite. To solve this problem, this paper proposes an implementation in Field Programmable Gate Array (FPGA) of a PRNG, which uses the k – logistic map concept, discarding the most significant k decimal digits of an underlying orbit generated from the traditional logistic map equation. The results from synthesis and simulations show that the designed circuit is a low-cost and a high efficiency RNG solution.