Abstract

The dominant silicon devices used in ULSI (Ultra Large Scale Integration) are considered likely to be CMOS (Complementary Metal Oxide Semiconductor) devices, except for dc limited areas in, which bipolar devices may survive, Even high performance CPUs (Central Processing Units) of mainframe computers are going to be replaced by CMOS, because CMOS devices can meet severe requirements for power reduction, performance improvement and cost reduction, while maintaining a high integration capability. However, CMOS devices are not perfect, and performance improvements are constrained by several physical phenomena such as the short-channel-effects, carrier velocity saturation, and resistance/capacitance increase. We perform CMOS-device performance evaluation using an analytical model, in which carrier velocity saturation, diffusion-layer resistance and capacitance, and mobility degradation etc. are taken into consideration, This analysis suggests what the device structures should be. Then, several measures necessary for performance improvements are described, and finally characteristics of the fabricated CMOS devices are introduced.

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