Abstract

Complementary metal oxide semiconductor (CMOS) device has been successfully evolved with innovative techniques, e.g., stress engineering, high-klmetal-gate, three-dimensional device structure, for the past a few decades. As a new pathway, the adoption of ferroelectric materials in gate stack of CMOS device has been received lots of attention. In this work, the device design guidelines for ferroelectric-gated CMOS device are to be discussed.

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