GNRFET BASED DYNAMIC D FLIP FLOP DESIGN

Abstract

The D flip-flop is an important memory component that is used in wireless communication devices. It offers enhanced power consumption and performance compared to other flip-flops. Researchers have offered the idea in order to improve energy efficiency as well as approaches for the generation of power. Computer systems also make use of flip-flop registers as a means of conserving energy and avoiding the wasteful dissipation of that energy. In this thesis, an alternative design for a D flip-flop is given to replace the Graphene Nano Ribbon Field Effect Transistor in the 22nm technology channel in order to accomplish efficient energy generation. The goal of this replacement is to reduce the size of the transistor. The suggested circuit has been shown to perform better in terms of mean power, time delay, and energy dissipation by means of the HSPIICE simulation. Flip-flops of the D kind are used in wireless sensor networks in order to lessen the amount of power that is consumed and to improve power management. GNRFETs have a voltage dissipation that is much better than that of bulk CMOS MOSFETs, which makes them a practical choice for the 22nm channel length technology