Abstract

A ceramic pin grid array (PGA) package for industrial computers has been developed by applying tape automated bonding (TAB) technology to one of the largest (20*20 mm) and highest pin count (820 pins) application-specific integrated circuits (ASICs) available in the semiconductor industry. To fabricate this package, a series of TAB assembly processes containing inner lead bonding (ILB), cutting and forming of TAB outer leads, solder sheet mounting, outer lead bonding (OLB), die attachment and lid sealing have been developed. To realize single-point TAB technology, the optimum design for a tape carrier and for electrode pad patterns on a ceramic substrate has been explored, a new bonding tool has been developed, and the optimum thickness of gold, plated on the electrode pads on the ceramic substrate, has been investigated. As a result of these investigations, outer lead bond strengths exceeding 30 gf and bonding accuracy within +or-10 mu m have been achieved. Degradation of bond strength by thermal cycle tests was not observed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

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