Fine grain multi-V<inf>T</inf> co-integration methodology in UTBB FD-SOI technology

Abstract

Ultra-Thin Body and BOX Fully-Depleted SOI (UTBB FD-SOI) technology is one of two candidate technologies for replacing Bulk technology at sub-20nm nodes. Although it represents a smooth transition from Bulk, i.e. being a planar technology with a similar gate stack and a simpler front-end-of-line process, it enables a reinforced process-design co-optimization thanks to Well engineering capability. This added degree of freedom has unleashed the creativity of designers and technologists, creating objects like ‘flip-Well’ and ‘single-Well’ logic gates. This paper presents the state-of-the-art of UTBB FD-SOI implementation strategies and solves the multi-V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</inf> constrains thanks to innovative fine grain co-integration approaches.