A Fully Integrated 2:1 Self-Oscillating Switched-Capacitor DC–DC Converter in 28 nm UTBB FD-SOI

Matthew Turnquist,Markus Hiienkari,Jani Mäkipää,Lauri Koskinen

doi:10.3390/jlpea6030017

Matthew Turnquist, Markus Hiienkari + Show 2 more

Open Access

https://doi.org/10.3390/jlpea6030017

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Abstract

The importance of energy-constrained processors continues to grow especially for ultra-portable sensor-based platforms for the Internet-of-Things (IoT). Processors for these IoT applications primarily operate at near-threshold (NT) voltages and have multiple power modes. Achieving high conversion efficiency within the DC–DC converter that supplies these processors is critical since energy consumption of the DC–DC/processor system is proportional to the DC–DC converter efficiency. The DC–DC converter must maintain high efficiency over a large load range generated from the multiple power modes of the processor. This paper presents a fully integrated step-down self-oscillating switched-capacitor DC–DC converter that is capable of meeting these challenges. The area of the converter is 0.0104 mm2 and is designed in 28 nm ultra-thin body and buried oxide fully-depleted SOI (UTBB FD-SOI). Back-gate biasing within FD-SOI is utilized to increase the load power range of the converter. With an input of 1 V and output of 460 mV, measurements of the converter show a minimum efficiency of 75% for 79 nW to 200 µW loads. Measurements with an off-chip NT processor load show efficiency up to 86%. The converter’s large load power range and high efficiency make it an excellent fit for energy-constrained processors.

Highlights

The relevance of energy-constrained processors [1,2,3,4,5,6] in sensor-based platforms for Internet-of-Things (IoT) applications continues to grow
The DC–DC converter is a critical block since the energy consumption of the DC–DC/processor system is proportional to the efficiency of the DC–DC converter
Achieving high efficiency in the DC–DC converter is essential to realize energy savings associated with NT operation of the processor

Summary

Introduction

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Back-Gate Biasing

Measurement Results

Conclusions