Abstract

The test chip including transistors and Static Random Access Memory (SRAM) is proposed and fabricated by an advanced 22 nm Ultra-Thin Body and Buried Oxide Fully Depleted Silicon-on-Insulator (UTBB FD-SOI) technology. Experimental results of Co-60 irradiation and heavy ion experiments are presented. Total Ionizing Dose (TID) experiment results show that the threshold voltage shift of the transistor is about 100 mV when the dose is 500 krad(Si) and the SRAM irradiated to a dose of at least 300 krad(Si) can maintain its functionality, which means that 22 nm UTBB FD-SOI devices exhibit significantly improved total dose tolerance performance compared to the previous generation process. TID-induced threshold voltage shift in conventional-well nMOSFET can be mitigated by applying biasing to back-gate, while back-gate biasing is invalid for TID mitigation of the conventional-well pMOSFET. Heavy ion experimental results make known that 22 nm UTBB FD-SOI technology has contributions to Single Event Effect (SEE) hardness and the hardened SRAM has higher single event upset (SEU) tolerance and even SEU immunity. The research indicates that the circuits manufactured by 22 nm UTBB FD-SOI technology have great potential space applications in harsh radiation environments.

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