FEA Assisted Optimization of Bump Shear Test Method for Assessment of Back-End-of-Line Mechanical Integrity

Abstract

An enhanced Cu pillar bump shear test (BST) method has been developed to quantify wafer level back-end-of-line (BEOL) mechanical integrity and assess the risk of white bump failure. First, three different types of failure mode in the BST and the one that corresponds to the white bump failure in which delamination occurs at an ultra-low-k (ULK) dielectric layer, were identified by studying the load-displacement data together with focused ion beam (FIB) and scanning electron microscopy (SEM) analysis. To find the reason for different failure modes in BST and the effects of BST conditions, first, the difference in the stress modes between the bump shear test and the assembly solder reflow process was compared using finite element analysis (FEA) stress simulations. Then, parametric studies on the bump shear angle and the bump shear height were performed to find the optimal conditions at which the BST stress modes best mimic those of the solder reflow. Based on these studies, special high Cu pillar bump test samples were built in order to apply the optimal shear height and angle condition. The new optimal BST method has shown to significantly increase the probability of ULK delamination failure mode and was shown to be in good agreement with reflow hammer test results. Also, the method was used to verify the effect of metal density as well as process and design changes. Finally, a machine learning based correlation for quantifying the pure BEOL integrity regardless of the bump and far-BEOL dimensions was developed for application of the method to various products.