Abstract
In the past few years, novel assembly schemes, such as Flip Chip, 3D assemblies, and advanced low-k/ultralow-k dielectric materials have been introduced in the semiconductor industry. Aiming to develop and grant maturity milestones, standardized procedures are used to assess the assembly reliability. Among them, bump shear test provides a quantitative measure of the bonding strength between the Bump, UBM and pad structure. In this paper, some investigations on the failure mechanism induced by shear test are proposed. At first, it is shown experimentally that, for similar structures, the failure mode depends on the shear tool standoff. More precisely, high height values promote the cratering mode (i.e. fracture in the interconnect layers) whereas low ones induce a ductile mode (i.e. fracture in the bulk Aluminum layer). A numerical model is carried out to provide a better understanding of the mechanisms. Finite element simulations highlight a strong variation of the peeling stress according to the shear height, whereas the shear stress component remains quite stable. Based on these experimental and numerical findings, distinct scenarii and criterion are proposed to explain the fails. This approach is consolidated by extending the comparisons with additional experimental results. At last, the preliminary results of a time dependent study (effect of the shear tool speed and a non linear copper law) are discussed. These first insights aim at giving additional input on the physics occurring during the test.The present work proposes a validated numerical basis to explain and forecast the failure mode preference during a bump shear test. This provides some clues for design guidelines, process integration and product developments.
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