Fault Diagnosis of a Sense Amplifier Circuit

Abstract

The Sense Amplifier-based Pass Transistor Logic (SAPTL) is a low energy alternative logic topology to fully complementary static CMOS logic. This circuit topology allows the reduction of energy per operation via voltage scaling even in the presence of leakage energy. As the sense amplifier is an essential circuit in designing memory chips, this paper focuses the diagnosis of faults of a sense amplifier used in SAPTL circuit. For that, a particular fault model called stuck-at fault has been introduced. The advantage of the proposed approach is its ability to distinguish between the stuck at Logical ‘1’, ‘0’ and ‘x’. Also, the design and simulation result of a sense amplifier based pass transistor circuit topology has been presented. Then, the results are compared with the stack circuit simulation results using bar graphs.