Abstract

Silicon carbide (SiC) static induction transistors (SITs) were fabricated using home-grown epi structures. The gate is a recessed gate - bottom contact (RG - B). The mesa space designed is 2.5 μm and the gate channel is 1.0 μm. The developed devices adopted a p-type Al ion implanted gate and power performance was improved by decreased leakage current and enhanced break-down voltage. The lift-off with assistant dielectric, dense gate recess etching, high temperature anneals and PECVD passivation process technologies are adopted. One cell has 200 source fingers and each source finger width is 50 μm. 0.5 mm SiC SIT yield a current density of 110 mA/mm at a drain voltage of 50 V. A maximum current density of 160 mA/mm was achieved with Vd = 80V, and the maximum transconductance is 40mS/mm. The device blocking voltage with a gate bias of-12 V was 400 V. Packaged 2 × 2-cm devices were evaluated using amplifier circuits designed for class AB operations. A total power output in excess of 70 W was obtained with a power density of 17.5 W/cm and gain of 5.5 dB at L band 1 GHz under pulse 100μs and cycle ratio 1% RF operation and 80V drain to source voltage.

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