Fabrication and characterisation of SiGe based in-plane-gate transistors

Abstract

We present an in-situ technology for fabrication of barrier structures in modulation-doped SiSiGe in-plane-gate (IPG) transistors. A special multilayer-resist system is developed for pattern transfer by electron-beam lithography (EBL) and anisotropic SF6O2 dry etching. Barriers are realized by etch-trenches cutting the two dimensional electron gas (2DEG). The trenches are filled up with a low temperature remote plasma enhanced chemical vapour deposition (RPECVD) of silicondioxide (SiO2). Dry-etching and passivation are done in-situ to avoid contamination. IPG transistors with different geometric dimensions have been fabricated and electrically characterised. Transistor operation is demonstrated up to T=77 K. The breakdown voltage and the depletion length of the devices are estimated. The obtained data indicate the advantage of the presented in-situ technology in comparison to other fabrication techniques.